The invention relates to an automatic gain control (AGC) circuit, and more particularly, to an AGC circuit employing a field effect transistor (FET's).
AGC circuits employing FET are known, but involve the disadvantage that as the magnitude of an input signal increases, even harmonics increase to degrade the distortion factor.
By way of illustration, a conventional AGC circuit is shown in FIG. 1 wherein an N-channel FET Q.sub.1 of junction type has its drain electrode D connected with an input terminal 1 and its source electrode S connected with an input terminal of an amplifier 3. A negative feedback path including a rectifier 4, and a smoothing circuit comprising a capacitor 5 and a resistor 6 is connected between an output terminal 2 of the amplifier 3 and a gate electrode G of the FET Q.sub.1. FIG. 2 graphically shows the distortion characteristic (curve a) and input-output characteristic of the AGC circuit shown in FIG. 1. As will be evident, the distortion increases with an increase in the input level, due to increasing even harmonics. An increase of the distortion is attributable to a variation with time in the impedance across the drain and source of FET Q.sub.1 which results from a variation in the gate potential as it is fed by the rectified output, when the input level is high to cause a large variation of a signal level with time. This is illustrated in FIGS. 3 and 4. In FIG. 3, an input signal has a high amplitude, so that the impedance across the drain and source of the field effect transistor will be high at point A and low at point B, resulting in a distorted output signal as indicated by a curve C. However, the input signal shown in FIG. 4 has a reduced amplitude, so that there is little difference in the impedance between points Ao and Bo. Hence, the distortion in the output signal will be substantially reduced.